Project Vicigol - Reverse-engineering a 28-bit RISC CPU
A while ago, I found a curious little processor and starting reverse-engineering it. Join me as I retell my journey through the Amlogic Video Decoder, from staring at bits over running hand-written instructions, to my own emulator and architecture manual.
Disclaimer: "28-bit" isn't quite correct, but you'll see.
Project homepage / Git repo: https://codeberg.org/neuschaefer/vicigol (will go live during GPN)
Licensed to the public under https://creativecommons.org/licenses/by/4.0/