Many developers know that the answer to "How do I debug this microcontroller" is either "JTAG" or "SWD". But what does that mean, exactly? How do you get from "Wiggling wires" to "Programming a chip" and "Halting on breakpoints"? This talk will cover how common debug protocols work starting from signals on physical wires, cover common mechanisms for managing embedded processors, and ending up at talking to various common microcontrollers.
Embedded programming is the art of shrinking complex programs in tiny packages by throwing away unnecessary features. With modern microcontrollers, debugging need not be one of the features thrown away. Most modern chips include some form of low-level access, but the technical details aren't widely understood. Many users of embedded firmware will use their preferred debugger without thinking too hard about what's going on underneath.
We'll start by covering what it means to debug embedded software. The primitives required to have an interactive debug session are surprisingly minimal. From this, we'll build up a list of requirements and "nice to haves" to make a debugging environment comfortable, and reference existing "bespoke" debug approaches. We'll cover several examples of debug engines ranging from cores designed to go into FPGAs to tiny 8-bit microcontrollers.
Next, we'll take a step back and describe the common lower-level protocols such as JTAG and SWD. These describe physical signals that go between the host and the target. We'll compare various protocols and see how they map onto the higher-level primitives discussed earlier. Armed with examples, we'll see how the protocol stack is formed.
Next, we'll use the knowledge of low-level protocol implementations and the requirements for debugging to look at common abstractions on top of physical transports to implement core control. This will bridge the gap between "JTAG or SWD are the protocol" to "Poking a value in memory on a microcontroller". In this section, we'll cover the more common and generic uses such as Arm's ADI and the RISC-V DMI and see how complex and cross-target configurations are built to be rigid enough to have rich debug features while flexible enough to handle a wide range of processor configurations.
Finally, we'll cover common tasks such as programming flash memory, watchpoints, and single-step debugging -- things that we take for granted in the desktop world and would like to have when programming for a potato that costs less than an actual potato.
Licensed to the public under http://creativecommons.org/licenses/by/4.0
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